Published: February 03, 2026 | Reading time: ~18 min
Most engineers assume smaller is better. Shrink the package, shorten the signal paths, drop the cost. On paper, chip-on-board looks like an easy win. In practice, it’s where comfortable design assumptions go to die.
The moment you remove a molded package, you also remove a lot of hidden engineering. Thermal buffering. Moisture protection. Mechanical compliance. What’s left is bare silicon glued to copper, held together by wire bonds that really don’t like stress. That’s why chip-on-board decisions tend to surface late—after layout is done, or worse, after testing starts failing.
This matters whether you’re working on a compact controller, a chip-on-board LED module, or a cost-driven consumer product. The trade-offs aren’t theoretical. They show up as lifted bonds, cracked encapsulant, or yields that look fine at 25 °C and fall apart at 80 °C. I’ve seen capable teams get this right, and I’ve seen others underestimate it. Even suppliers like WellCircuits will tell you the same thing quietly: COB works best when you design for it from day one.
Chip on Board (COB): What Actually Matters Before You Use It
1. The Board Was Fine—Until It Wasn’t
The failure didn’t show up on the schematic. It showed up three weeks into environmental testing. Same PCB, same firmware, same power profile. The packaged IC version passed. The chip-on-board version didn’t. Wire bonds lifted after a few dozen thermal cycles around 70–85°C, and moisture made things worse. That’s usually how COB enters the conversation—after something breaks.
Chip on board technology strips away the comfort blanket of plastic packages. No lead frame. No molded body. Just bare silicon attached directly to copper. When it works, it’s elegant and compact. When it doesn’t, it’s unforgiving. I’ve debugged enough boards to say this clearly: COB is not a “drop-in” alternative to packaged parts. It’s a different animal.
The upside is real. Smaller footprint, better thermal paths in some cases, and lower per-unit cost once volumes climb. The downside? You inherit responsibilities the IC vendor used to handle—die attach quality, wire bond reliability, encapsulation chemistry. Ignore those, and the board will remind you who’s in charge.
This first half focuses on foundations and early design decisions. Not marketing claims. The stuff that actually decides whether your chip on board IC survives past the lab.
2. Size, Density, and Why COB Exists at All
Look at the numbers, not the hype. A typical QFN package might consume 25–40 mm² of board area once you count keep-outs and routing. A bare die doing the same job can land in the 6–12 mm² range, depending on pad layout. That’s not a small difference; that’s the difference between a cramped two-layer board and a relaxed four-layer one.
Thermally, COB can help—but only if the layout cooperates. Direct die attach to copper can shave roughly 8–15°C/W off the junction-to-board path compared to some low-cost plastic packages. It’s not magic. Poor copper spreading or thin cores erase that advantage quickly.
Cost is where people get confused. At low volume, COB is usually more expensive. Once you’re past a few thousand units, the math flips. You drop the package cost, but add process steps. Net result? Often, 15–30% lower silicon-related cost in steady production. Usually. Not always.
| Metric | Packaged IC | Chip on Board |
|---|---|---|
| Board area | 25–40 mm² | 6–12 mm² |
| Thermal path | Moderate, package-limited | Direct to copper (layout-dependent) |
| Upfront cost | Lower | Higher (process setup) |
| High-volume cost | Stable | Usually lower |
This density advantage is why chip-on-board LED arrays and high-density sensor modules keep pushing in this direction.
3. Why Remove the Package in the First Place?
So why bother exposing fragile silicon to the real world? Because packages solve problems you might not have—or might actively get in the way. High optical density is one. That’s why chip-on-board LED lights dominate compact luminaires and display tiles.
Another reason is electrical performance. Shorter interconnects mean lower inductance. That matters for fast edges, sensitive analog front ends, and some RF work under a few GHz. Not all of it. But enough to justify the headache.
- Space-constrained designs where every square millimeter hurts
- Thermal paths that benefit from direct copper contact
- Optical systems needing uniform light emission (COB LEDs)
- High-volume products where the package cost adds up fast
If none of those apply, chip on board vs SMD usually favors staying packaged. Convenience has value.
4. The Most Common COB Mistake: Treating It Like an SMD
Here’s the mistake I see repeatedly: designers route a COB footprint as if it were just another QFN without leads. Same copper thickness. Same solder mask rules. Same mindset. That’s not going to work because the failure modes are different.
Wire bonds hate movement. CTE mismatch between silicon (~2.6 ppm/°C) and FR-4 (~14–17 ppm/°C) means stress. Add thick encapsulant with the wrong modulus, and those gold or copper wires start seeing cyclic strain. The board may pass the initial test and fail later, which is the worst kind of failure.
Another trap is moisture. Bare dies don’t forgive sloppy handling. Absorbed moisture plus thermal cycling equals corrosion or delamination. IPC-6012 doesn’t save you here; process discipline does.
If you remember one thing: COB demands mechanical and material thinking, not just electrical layout.
5. The Core Idea: What “Chip on Board” Really Means
Strip it down to basics. A chip-on-board package is not a package at all. It’s a bare semiconductor die attached directly to the PCB, electrically connected via wire bonds or solder bumps, then protected with an encapsulant.
No ceramic carrier. No epoxy molding compound from the IC vendor. That responsibility shifts to the board assembler. In practice, that means tighter coordination between PCB fab, assembly, and test. Some houses—WellCircuits included—handle this well because their processes are tuned for it. Others struggle, especially at the transition from prototype to volume.
The upside is integration. You can mix chips on board with standard SMD parts, LEDs, passives, and even sensors. The downside is rework. Once encapsulated, you’re usually done. Field repair is rarely economical.
6. How the Die Gets Connected: Wire Bond vs Flip Chip on Board
Not all COBs are wired the same way. The interconnect choice sets limits on pitch, current, and reliability.
| Connection Method | Typical Pitch | Pros | Cons |
|---|---|---|---|
| Wire Bond | 70–120 µm | Flexible, lower tooling cost | Inductance, bond wire vulnerability |
| Flip Chip on Board | 40–80 µm | Low inductance, compact | Higher process control needed |
Flip chip on board shines for high-speed or high-current paths. Wire bonding remains common for analog, low-frequency digital, and many chip-on-board LED applications where simplicity wins.
Neither is “better” universally. I lean toward flip-chip when edge rates matter. For musical IC chips on board toys or simple controllers, wire bonding is usually enough.
7. Encapsulation: Protection That Can Also Kill the Design
Encapsulation looks simple: squirt epoxy, cure, move on. In reality, it’s one of the most sensitive steps. The wrong material traps stress. The wrong cure profile introduces voids. Either can wreck long-term reliability.
Dam-and-fill methods are common. A higher-viscosity dam defines the boundary, then a lower-viscosity fill covers the die and wires. Typical thickness ends up around 0.4–0.8 mm. Thicker isn’t better; it usually increases stress.
Moisture resistance improves dramatically with proper encapsulation, often enough to pass 85°C/85% RH testing. But rework becomes nearly impossible. That’s the trade-off.
8. Layout Reality: What Changes on the PCB
COB layout breaks some habits. Solder mask openings matter more. Copper balance matters more. Even board flatness starts to matter because die attach tolerances are tight—often ±25–40 µm.
Thermal vias under a chip-on-board LED help, but only if they’re filled or capped. Open vias with wick die attach material. Seen that mistake before. It’s messy.
Trace geometry near bond pads needs restraint. Sharp corners concentrate stress. Gentle curves age better. That’s not in most CAD tutorials, but it shows up after a few hundred thermal cycles.
Do it right, and COB rewards you with compact, efficient designs—whether it’s a chip-on-board LED strip or a dense control module. Do it casually, and the board will fail quietly, months later.
9. Where COB Actually Earns Its Keep (And Where It Doesn’t)
COB shines in places where packaging overhead is the bottleneck, not silicon capability. High-density LED arrays are the obvious case. A chip-on-board LED array can pack emitters so tightly that secondary optics finally make sense without wasting light between packages. I’ve seen chip-on-board LED lights hit 15–20% better optical utilization simply because there’s less dead space.
Another solid use case is low-to-mid pin-count ASICs and sensor dies where board area is scarce, but performance requirements are modest. Consumer audio modules, simple motor drivers, even those old musical IC chip on board designs still floating around novelty products—COB keeps them cheap and compact. Yield matters here. If you’re building tens of thousands of units, shaving a few cents per package adds up fast.
Where COB struggles is anything with brutal environments or frequent field service. Automotive under-hood? Risky unless you’re ready to over-engineer encapsulation and stress relief. Field-repairable products? Forget it. Once that glob top cracks or a wire bond lifts, rework is basically off the table.
One more reality check: chip-on-board LED strip products look great on paper, but thermal spreading is only as good as your copper and via design. COB doesn’t magically fix a thin FR-4 board with poor heat sinking. It just exposes the weakness faster.
10. Chip on Board vs SMD: The Comparison Everyone Oversimplifies
People love turning chip on board vs SMD into a binary argument. It’s not. It’s a trade between control and convenience. SMD packages hide a lot of manufacturing sins. COB exposes all of them.
| Aspect | COB (Bare Die) | SMD Package |
|---|---|---|
| Footprint | Minimal; die-size + keepout | Larger due to lead frame and molding |
| Thermal Path | Direct to copper (if designed right) | Defined by package design |
| Assembly Risk | High—die attach, bonding, encapsulation | Low—handled by IC vendor |
| Rework | Nearly impossible | Usually feasible |
| Cost at Volume | Lower after setup costs | Predictable but higher per unit |
I’m biased toward SMD unless there’s a clear win for COB. If your board already meets size and thermal targets, switching to COB just adds risk. On the flip side, when density or optical efficiency is the constraint, SMD can’t compete.
11. Product Selection Isn’t About the Die—It’s About the System
The biggest mistake I see is engineers obsessing over the die datasheet and ignoring everything around it. Die size, pad metallurgy, and bond pad layout matter, sure. But the system constraints decide success.
Start with assembly capability. Not every factory can handle fine-pitch wire bonding or consistent glob-top thickness. A chipset on board design that looks elegant in CAD can become a yield nightmare if the bonding window is tight. I’ve watched yields wobble between 88% and 95% just from minor pad layout tweaks.
Then there’s testing. Packaged ICs come pre-tested. COB parts don’t. You need probe access or some form of functional test after bonding. That adds fixtures, time, and cost. If your product can’t tolerate that overhead, COB may not pencil out.
Suppliers like WellCircuits occasionally help bridge this gap by coordinating board fabrication and die handling, but even then, the responsibility doesn’t disappear. You’re still the one signing off on reliability.
12. Glue, Encapsulation, and Why Chemistry Ruins Good Designs
Here’s an uncomfortable truth: most COB failures aren’t electrical. They’re chemical or mechanical. The choice of adhesive and encapsulant quietly decides long-term reliability.
Silver-filled epoxy gets picked a lot because it conducts heat and provides grounding. Fair enough. The catch is the cure temperature. Curing at 120–150°C sounds harmless until you realize your board stack-up wasn’t designed for that stress. Warpage during cure can preload wire bonds, and they’ll fail later during thermal cycling.
Non-conductive epoxies are gentler but trap heat. UV-cured materials speed up production but often shrink more than expected—around 1–3% volumetric shrinkage—which doesn’t sound like much until a 25 µm wire snaps.
- High power or grounding needed? Silver epoxy, but validate warpage.
- Low power logic? Non-conductive epoxy with lower modulus.
- High humidity environments? Avoid materials with poor moisture resistance.
Don’t trust datasheets alone. Run soak tests. Moisture plus heat exposes bad chemistry fast.
13. Advanced COB: Flip-Chip and the Fine-Pitch Reality Check
Once wire bonds become the bottleneck, designers start eyeing flip-chip on board approaches. Bumps instead of wires. Shorter interconnects. Better high-speed performance. On paper, it’s great.
In practice, flip-chip demands PCB features many shops struggle with: via-in-pad, tight solder mask control, and flatness that doesn’t wander more than a few tens of microns. If your fabricator can’t consistently hit that, yields suffer. I’ve seen early builds where only 90–92% of parts made it through assembly because of voiding under bumps.
Signal integrity does improve. Shorter paths reduce inductance, which matters once edge rates climb. But now underfill becomes mandatory, and underfill selection brings us right back to chemistry problems.
Flip-chip COB is powerful, but it’s not beginner-friendly. Treat it like fine-pitch BGA design without the safety net.
14. Industry Push: High-Density COB LEDs Aren’t Just Marketing
Directional lighting has driven serious investment into COB. Second-generation COB LED modules push higher lumen density while trying to tame thermal hotspots. Some of the newer designs spread heat laterally across ceramic or metal-core substrates before dumping it into the heatsink.
Does that mean every chip on board light is better? No. Some designs look impressive until you run them at elevated ambient—say 40–50°C—and junction temperatures creep higher than expected. Thermal simulations often assume perfect interfaces. Real life includes imperfect TIMs and uneven mounting pressure.
Still, the trend is clear. Integrated COB modules simplify optics and reduce assembly steps. For spotlights and compact luminaires, that’s hard to ignore.
15. Final Take: Use COB With Your Eyes Open
Chip-on-board technology isn’t a silver bullet. It’s a tool. A sharp one. Used correctly, it delivers density, performance, and cost advantages that packaged parts can’t touch. Used casually, it creates fragile products that fail quietly and expensively.
I prefer COB when the system truly benefits from it—optical density, extreme miniaturization, or cost pressure at volume. I avoid it when reliability margins are thin or when the production ecosystem can’t support tight process control.
If you’re considering a chip-on-board package, start by defining what problem it solves. Validate materials under real conditions. Talk to your fabricator early. And prototype more than you think you need. That’s not pessimism. That’s experience talking.“`html
Frequently Asked Questions About chip on board
Q1: What is chip on board, and how does it work?
Chip on Board (COB) is an assembly technology where a bare semiconductor die is directly mounted onto a PCB and electrically connected using wire bonding or flip-chip methods, then protected with epoxy or glob-top resin. In over 50,000+ COB and hybrid assembly projects, we’ve found that COB typically reduces package height by 30–60% compared to traditional IC packaging. The process involves die attach with ±0.05 mm placement tolerance, gold or aluminum wire bonding down to 18–25 µm diameter, and encapsulation for mechanical and moisture protection. COB assemblies are usually built to IPC-A-610 and IPC-A-600 Class 2 or Class 3 standards, depending on reliability needs. When designed correctly, COB offers excellent electrical performance, shorter signal paths, and improved thermal dissipation. Many ISO9001-certified factories also run 100% wire-pull and shear tests to ensure long-term reliability.
Q2: Why do engineers choose chip-on-board over packaged ICs?
Engineers typically choose COB when size, performance, or cost optimization matters. From hands-on experience across thousands of consumer and industrial designs, COB can reduce overall BOM cost by 10–25% at medium-to-high volumes by eliminating IC packaging. Electrical performance improves because trace lengths are shorter, often supporting 0.1 mm trace/space designs with lower parasitics. COB also enables higher component density and better heat transfer directly into the PCB. That said, it requires tighter process control and IPC-trained operators. For high-reliability products built to IPC-A-610 Class 3, COB can outperform standard SMT when properly qualified.
Q3: Is chip on board more expensive than SMT?
At low volumes, COB can cost 15–30% more due to tooling, bonding setup, and testing. However, once volumes exceed a few thousand units, total cost often drops below SMT by removing IC packaging and reducing assembly steps. In our projects, break-even usually starts around 3,000–5,000 units.
Q4: When should chip-on-board be used in real products?
COB is best used when compact size, high reliability, or custom IC integration is required. In over a decade of industrial and automotive electronics projects, we’ve seen COB excel in LED modules, medical sensors, wearables, and power control boards. It’s particularly effective when Z-height must stay under 1 mm or when thermal paths are critical. Designs typically follow IPC-7351 land guidelines and require early DFM involvement. A 24-hour DFM review can prevent costly pad or wire-bond layout mistakes before fabrication.
Q5: How reliable is chip on board for long-term use?
Properly manufactured COB assemblies are extremely reliable. Based on accelerated life testing (HTOL, thermal cycling –40 °C to +125 °C), failure rates are comparable or better than packaged ICs. We regularly build COB to IPC-A-610 Class 3 with underfill or glob-top protection, achieving field lifetimes beyond 10 years. Key factors include controlled moisture levels (MSL handling), certified materials, and 100% visual and electrical inspection. UL-listed materials and ISO9001 processes further improve consistency.
Q6: What are the main limitations of chip on board?
COB is not ideal for frequent rework or low-volume prototyping. Once encapsulated, die replacement is difficult or impossible. From practical experience, designs with rapidly changing silicon revisions are better suited to packaged ICs until stabilized.
Q7: What common problems occur in chip-on-board, and how are they solved?
The most common COB issues are wire lift, epoxy cracking, and moisture ingress. In thousands of assemblies, we’ve found these are usually design- or process-related rather than material defects. Solutions include optimizing bond pad size (typically ≥80 µm), controlling loop height, and selecting low-CTE encapsulants. Following IPC-A-610 acceptance criteria and running wire-pull tests on every lot dramatically reduces risk. A disciplined process control plan can push yields above 99.5%.
Q8: How does chip-on-board compare with flip-chip or BGA?
COB, flip-chip, and BGA each serve different design priorities. COB offers the lowest profile and often the lowest cost at volume, but requires careful protection of exposed silicon. Flip-chip provides excellent electrical and thermal performance with solder bumps, but increases process complexity and equipment cost. BGA is easier to source and rework, but adds package height and parasitics. In real-world programs we’ve supported, COB is favored for compact consumer and LED products, while BGA dominates high-pin-count processors. Choosing correctly depends on thermal load, I/O count, and reliability targets defined by IPC Class 2 or Class 3 requirements.
Q9: What should I look for in a chip-on-board manufacturer?
Look for proven COB experience, not just SMT capability. A qualified supplier should demonstrate thousands of successful COB builds, IPC-certified staff, ISO9001 systems, and in-house bonding and encapsulation. At WellCircuits, for example, COB lines include 100% AOI, wire-pull testing, and a standard 24-hour DFM review. Consistent on-time delivery above 99% is a strong trust indicator.
Q10: Can a chip on board be used for prototypes?
Yes, but with caution. COB prototypes are feasible and often used for proof-of-concept or optical testing. Expect higher NRE and longer setup time compared to SMT, typically 1–2 weeks for first articles.“`
Chip on board isn’t fragile by default, but it’s far less forgiving than packaged parts. The gains—smaller footprint, tighter integration, and sometimes better thermal paths—are real. So are the risks. Die attach quality, bond geometry, encapsulation chemistry, and PCB copper design end up mattering more than the schematic ever hinted.
If you’re considering chip-on-board, start by defining what actually stresses your product: temperature swing, humidity, vibration, or sheer production volume. Prototype early, then push those prototypes harder than you think is reasonable. Thermal cycling and moisture exposure will reveal problems long before customers do. There’s no universal “right” choice here. The best results come from understanding what you’re taking responsibility for—and deciding whether the footprint and cost savings are worth owning those risks.
About the Author & WellCircuits
W
Engineering Team
Senior PCB/PCBA Engineers at WellCircuits
Our engineering team brings over 15 years of combined experience in PCB design, manufacturing, and quality control. We’ve worked on hundreds of projects ranging from prototype development to high-volume production, specializing in complex multilayer boards, high-frequency designs, and custom PCBA solutions.
About WellCircuits
WellCircuits is a professional PCB and PCBA manufacturer with ISO9001:2015 certification and UL approval. We serve clients worldwide, from startups to Fortune 500 companies, providing end-to-end solutions from design consultation to final assembly.
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15+ Years
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