PCB Fabrication: From Raw Laminate to Production-Ready Board (2026)

Meta description: A complete guide to PCB fabrication — the multi-step process that transforms design files into production-ready circuit boards. Covers materials, drilling, plating, patterning, surface finishes, and how to choose a fabricator.

TL;DR — Key Takeaways

• PCB fabrication is the process of manufacturing bare circuit boards from substrate materials; PCBA (printed circuit board assembly) adds components and is a separate step.
• The core fabrication workflow runs through 10 distinct stages: material prep, inner layer imaging/etching, AOI inspection, lamination, drilling, through-hole plating, outer layer patterning, solder mask, and surface finish.
• FR-4 substrate with Tg values of 130–140 °C (standard) or 150–170 °C (high-Tg) handles the majority of commercial builds; Rogers and other high-frequency laminates dominate RF and microwave applications.
• Drill aspect ratios of 6:1 to 10:1 are standard; anything above 12:1 requires specialized equipment and tighter fab house coordination.
• IPC-6012 Class 2 vs. Class 3 defines the quality tier of the finished board — Class 3 is required for aerospace, medical, and automotive safety-critical applications.
• Surface finish selection is a trade-off between shelf life, solderability, thermal cycling resistance, and cost: HASL, ENIG, OSP, and Immersion Silver each serve different product profiles.
• RoHS compliance restricts lead, mercury, cadmium, and five other hazardous substances; virtually all commercial PCB fabrication today must meet RoHS 3 (EU 2015/863) requirements.
• Choosing a fabricator means asking about IPC-6012 class rating, UL 796 listing, minimum trace/spacing tolerances, drill capability, and surface finish options before releasing a purchase order.

Introduction

PCB fabrication is the manufacturing discipline that bridges electronic design and functional hardware. It is the set of processes that transforms a stack-up diagram, a netlist, and a set of Gerber files into a bare board — drilled, plated, masked, and finished — ready for component placement and soldering. Every smartphone, automotive ECU, industrial controller, and medical monitor on the planet begins as a fabricated PCB.

The tolerance stack, the drill aspect ratio, the glass transition temperature of the laminate, the uniformity of the copper plating — each of these variables is controllable, measurable, and specifiable. That is the nature of professional PCB fabrication: it is a precision engineering process with defined capability windows, measurable defect rates, and internationally standardized quality grades.

This article is written for design engineers, procurement specialists, and electronics professionals who need to understand exactly what happens inside a PCB fab, how quality is defined and measured, and what questions to ask before committing a design to production. The goal is to close the gap between the schematic in your EDA tool and the board that arrives on your workbench.

What PCB Fabrication Means (vs. PCBA)

It is common for the terms PCB and PCBA to be used interchangeably, but they refer to two distinct phases of electronics manufacturing.

PCB fabrication is the process that produces the bare board — the substrate, copper traces, drill holes, plated vias, solder mask, and surface finish — without any components attached. The output is a bare coupon of insulating material with conductive pathways embedded within it. The board is electrically complete but mechanically inert.

PCBA (printed circuit board assembly) is the subsequent process of soldering components onto the fabricated board — surface mount devices (SMD), through-hole parts, BGA packages, and any other electrically connected elements. This is where the board becomes a functional circuit.

The distinction matters for several practical reasons:

• Lead time: A bare PCB fabrication run typically takes 5–15 business days depending on complexity. PCBA adds another 3–10 days for component procurement and assembly.
• Cost drivers: Fab costs scale with layer count, minimum trace width, drill count, and surface finish. Assembly costs scale with component count, package type, and inspection requirements.
• Supplier base: Most fab houses do not offer assembly services; most EMS providers do not operate their own laminate mills or plating lines. They are different supply chains.
• Quality ownership: A delamination defect is a fab issue. A tombstoning defect is an assembly issue. Conflating the two during failure analysis wastes time and creates finger-pointing between vendors.

Understanding this split also matters for DFM (design for manufacturability). A board that is designed without consulting fab constraints will arrive back from manufacturing with drill breakouts, trace delamination, or registration errors that could have been avoided with a 10-minute pre-production review.

The 10-Step PCB Fabrication Process

The following sequence represents the canonical flow for a multilayer PCB. Single-sided and double-sided boards follow a subset of these steps; the process described here is for four-layer through multilayer boards, which represents the majority of commercial production.

Step 1: Design & Documentation

Before any material is cut, the fab house needs a complete engineering data package. The minimum deliverable is a set of Gerber files — the industry-standard output from EDA tools such as KiCad, Altium Designer, Cadence Allegro, or Eagle — that describe each copper layer, solder mask layer, silkscreen layer, and drill file (Excellon format).

A complete fab package includes:

• Copper layers (typically .GTL, .GTS, .GBL, .GBS for top/bottom signal and plane layers)
• Drill file (plated through-hole, non-plated through-hole, and any blind/buried via definitions)
• Solder mask layers (LR and LB for liquid photoimageable solder mask)
• Silkscreen layer (component outlines, reference designators, polarity markers)
• NC drill tool list and stack-up specification
• IPC-6012 class designation (Class 2 or Class 3) — this drives inspection severity and acceptance criteria throughout the line
• Surface finish specification (HASL, ENIG, OSP, etc.)
• Copper weight (1 oz/ft² = 34.8 µm or 2 oz/ft² = 69.7 µm are standard options)

The IPC-6012 standard (Invitational Industry Standard for Qualification and Performance Specification of Rigid Printed Boards) is the governing document for rigid board qualification. It defines laminate types, conductor width tolerances, annular ring requirements, dielectric spacing, and electrical test criteria. Specifying IPC-6012 Class 3 on your fab drawing is not optional if your board will see automotive, aerospace, or medical end-use — it defines what the manufacturer must inspect, how they must measure it, and what the accept/reject thresholds are.

Gerber X2 format (RS-274X) is the modern standard because it embeds aperture definitions, eliminating the most common source of manufacturing errors (missing aperture tables). Legacy Gerber 274D is still accepted by most fab houses but requires an accompanying aperture list.

Step 2: Material Preparation

The substrate material is selected based on the board's electrical, thermal, and mechanical requirements. For the overwhelming majority of commercial electronics — consumer devices, industrial controls, computing hardware — the substrate is FR-4.

FR-4 (Fire Retardant level 4) is a composite of woven fiberglass fabric impregnated with an epoxy resin. Its properties are well-characterized, its supply chain is deep, and its cost is low relative to specialty materials. FR-4 has a glass transition temperature (Tg) — the temperature at which the resin transitions from a rigid to a rubbery state — that defines its upper thermal operating limit.

Grade
Tg Range
Application
Standard FR-4
130–140 °C
Consumer electronics, general purpose
High-Tg FR-4
150–170 °C
Lead-free assembly (requires higher reflow temperatures)
Mid-Tg FR-4
145–150 °C
Mixed-use, moderate thermal demand

High-Tg materials became standard for lead-free assembly because RoHS-compliant solder processes require higher peak reflow temperatures (typically 245–260 °C for SAC305 alloy) compared to tin-lead eutectic (183 °C peak). A standard Tg laminate will begin to delaminate or warp at these temperatures. High-Tg FR-4 solves this problem at the cost of increased rigidity (less forgiving for complex board shapes) and slightly higher material cost.

For RF and microwave applications (5G, radar, satellite communications, high-speed digital), the substrate of choice shifts to Rogers Corporation materials (RO4003C, RO4350B, RT/duroid series) or equivalent ceramics. These materials offer a controlled, stable dielectric constant (Dk) across frequency — critical for predictable impedance in transmission lines and couplers. Standard FR-4 has a Dk that varies with frequency and temperature, which introduces unacceptable phase error in RF circuits above approximately 10 GHz.

Copper foil weight is specified in ounces per square foot (oz/ft²). Standard copper is 1 oz/ft² (approximately 35 µm thick). For power distribution boards, motor drives, and high-current applications, 2 oz/ft² (70 µm) or 3 oz/ft² (105 µm) copper is specified to reduce resistive losses and improve thermal performance. Heavy copper boards require adjusted etch times, different plating chemistries, and often a premium on the fab quote.

The fab house cuts the core and prepreg (B-stage epoxy-glass sheets that bond the layers together during lamination) to size, allowing for a board margin of at least 5 mm on each side for panelization and handling.

Step 3: Inner Layer Imaging & Etching

For multilayer boards, fabrication begins with the inner layers. The process for each inner layer is identical in concept:

• Surface cleaning: The copper-clad laminate is cleaned to remove oxidation and contaminants. Any organic residue at this stage will cause resist adhesion failures, resulting in open circuits after etching.

• Dry film resist lamination: A UV-sensitive photoresist film (typically 1–1.5 mils / 25–38 µm thick) is laminated onto the copper surface using heated rollers. The dry film conforms to the copper topology better than liquid resist and is standard for multilayer production.

• Exposure: The artwork (the negative image of the desired copper pattern, output from the Gerber data) is placed over the dry film, and the assembly is exposed to UV light (365 nm or 405 nm). The UV hardens the photoresist in the unblocked areas, forming a durable etch-resistant mask in the shape of the intended traces and planes.

• Development: The unexposed resist is removed using an alkaline developer solution (typically 0.8–1.0% sodium carbonate), leaving the hardened resist exactly where copper traces should remain.

• Etching: The board passes through an acidic copper etchant — ammonium persulfate, ferric chloride, or alkaline ammonia — which dissolves the exposed (unmasked) copper. The etch time, spray pressure, and solution temperature are all controlled parameters. Over-etching attacks the copper under the resist edge (undercut); under-etching leaves copper residues (bridges) between traces.

• Stripping: The remaining dry film resist is stripped using an alkaline or solvent solution, leaving only the etched copper pattern on the substrate.

Critical dimensions during inner layer processing include the minimum trace width and minimum spacing (the gap between adjacent conductors). Standard commercial fab typically guarantees 4–6 mil (0.1–0.15 mm) minimum trace/space. Advanced fab houses with laser direct imaging (LDI) can achieve 2–3 mil (0.05–0.075 mm) for fine-pitch, high-density designs. These tighter tolerances require significantly more expensive equipment and tighter environmental controls (temperature, humidity) and should not be specified without confirming fab capability.

Step 4: Optical Inspection (AOI for Inner Layers)

After inner layer etching and stripping, every panel undergoes automated optical inspection (AOI). AOI systems use high-resolution cameras and machine vision algorithms to compare the fabricated board against the original CAD data, detecting:

• Open circuits: broken traces where copper was completely removed
• Shorts/bridges: unintended copper connections between adjacent traces
• Under-etching: traces that are wider than spec due to incomplete copper removal
• Over-etching: traces narrower than spec due to excessive undercut
• Resist residue: traces that appear incomplete due to surface contamination
• Missing features: pads, thermal reliefs, or plane voids that were not fully developed

AOI for inner layers is considered essential because once layers are laminated together, inner-layer defects are inaccessible without destructive cross-sectioning. Modern AOI systems achieve >99.5% defect detection rates for standard geometries; for ultra-fine-pitch designs (below 3 mil trace/space), the detection rate degrades and some fab houses supplement AOI with laser scan inspection or electrical testing of individual inner layers before lamination.

Any defect identified by AOI is flagged for repair or rework: technicians can use a precision drill to clear a bridge or an epinephrine pen to add a small copper patch over an under-etched trace. However, some defects are unrepairable, and the inner layer panel is scrapped. Catching defects at this stage rather than after lamination and drilling prevents the compounding cost of building up through subsequent processes only to find an inner-layer failure at final electrical test.

Step 5: Layer Lamination & Pressing

Once all inner layers pass inspection and are backed with a layer of prepreg (B-stage epoxy-glass), they are stacked in the correct order according to the board's stack-up design. The stack-up defines:

• The sequence of signal layers, ground planes, and power planes
• The thickness of each dielectric layer (determined by prepreg brand, style, and ply count)
• The overall board thickness (typically 0.8 mm, 1.0 mm, 1.2 mm, 1.6 mm, or 2.0 mm for standard rigid boards)

The lamination press applies heat and pressure in a controlled cycle. A typical profile:

• Ramp to 120 °C: prepreg begins to flow and wet out the copper surfaces
• Ramp to 180 °C (for standard Tg) or 200–220 °C (for high-Tg): full resin cure — the epoxy cross-links from B-stage to fully hardened C-stage
• Pressure: 200–400 PSI maintained throughout the hot cycle
• Cool-down: controlled descent to below Tg before releasing pressure to prevent warp

The entire cycle takes 45–90 minutes depending on board thickness and panel size. Poorly controlled lamination produces delamination (layer separation), voids (unfilled resin areas that create stress concentrations and moisture traps), warpage (non-planarity that causes assembly problems), or resin recession at plated through-holes.

Post-lamination, the panel is inspected for dimensional accuracy — registration of inner layers to drill targets, overall thickness, and flatness (bow and twist). Boards that exceed IPC-6012 flatness tolerances (>0.5% bow for Class 2, >0.3% for Class 3) are flagged.

Step 6: Drilling

Drilling is one of the most capital-intensive steps in PCB fabrication. A modern CNC drilling machine (often called a driven-rack or precision drill) uses solid carbide or diamond-coated bits to drill from dozens to thousands of holes per panel at speeds of 60,000–150,000 RPM.

Through-hole drilling creates the holes that will become plated through-holes (PTH) for through-hole component leads, as well as non-plated mounting holes and vias. The drill hits per panel are catalogued by diameter; common sizes range from 0.2 mm (for fine-pitch vias) to 6.35 mm (for large connectors or large-component mounting holes).

Via types have specific manufacturing requirements:

Via Type
Description
Manufacturing Method
Through-hole via (TH)
Drills completely through all layers
Standard CNC drill
Blind via
Connects outer layer to one or more inner layers without penetrating the full board
Sequential lamination + laser or controlled-depth drill
Buried via
Connects inner layers only, invisible from outer surfaces
Sequential lamination + small drill or laser
Microvia
≤0.15 mm diameter, typically laser-drilled, used in HDI boards
CO₂ or UV laser ablation

The aspect ratio of a drill hole is defined as the ratio of board thickness to finished hole diameter. A 1.6 mm thick board with a 0.3 mm finished hole has an aspect ratio of approximately 5.3:1. Standard commercial fab capability is 6:1 to 10:1. Higher aspect ratios (10:1 to 15:1) are achievable but require back-drilling (removing the stub of a through-hole from the non-functional side after plating) or specialized plating processes. Aspect ratios above 12:1 significantly increase the risk of voids in the plated barrel — the copper plating inside the hole that provides the electrical connection.

Drill quality is measured by:

• Annular ring: the copper pad around the hole minus the drilled hole diameter. IPC-6012 requires a minimum 2 mil (0.05 mm) annular ring for Class 2 and 3 mil (0.076 mm) for Class 3.
• Hole positional accuracy: measured as deviation from the nominal drill target. ±3 mil (±75 µm) is standard; tighter tolerances require laser-drilled or photo-defined vias.
• Hole wall roughness: rougher walls reduce plating adhesion and increase impedance variation. Electroless copper process quality directly affects this.

After drilling, a desmear process removes the epoxy smear (resin that has been melted and redeposited on hole walls by the heat of drilling) from inside each hole. Without desmear, the copper barrel would not have a reliable metallurgical bond to the inner layer land. Plasma desmear and potassium permanganate chemical desmear are both used, with plasma preferred for high-density boards with small holes.

Step 7: Electroless Copper Plating (PTH)

Plated through-holes require a continuous copper conductor connecting all layers that the hole penetrates. The process is called electroless copper deposition or electroless copper plating — a catalytic chemical process that builds a thin copper film (typically 0.8–1.2 µm) on the exposed fiberglass and epoxy surfaces inside every drilled hole.

The sequence:

• Catalyst application: A palladium-tin colloidal catalyst is applied to the hole walls, creating a surface that will initiate the copper reduction reaction.
• Electroless copper bath: The board is immersed in a bath containing copper sulfate, formaldehyde (reducing agent), and complexing agents. The formaldehyde reduces copper ions to metallic copper on the catalyzed surfaces, depositing a uniform copper layer on all exposed fiberglass, epoxy, and inner-layer copper surfaces simultaneously.
• Panel plating: After electroless copper, the board goes to an electrolytic copper plating station where a thicker copper layer (typically 20–25 µm total on hole walls for standard builds, 25–30 µm for Class 3) is electrodeposited on top of the thin electroless base. The electrolytic process is faster and produces denser, more ductile copper than the electroless deposit.

The plating thickness in the hole barrel is the critical metric — it is not the same as the surface copper thickness. The hole barrel copper must carry the same current density as the surface trace, which means the barrel copper cross-section must be sufficient. For high-current designs, fabricators may specify heavy plating (40–50 µm barrel copper) or paste plating (a thick copper deposit specifically for heavy-current through-holes).

Quality checks at this stage include cross-section samples (destructive metallurgical sectioning of a representative hole) to measure barrel copper thickness and ductility, and low-level current testing (LLCT) to verify continuity through each hole before proceeding to outer layer processing.

Step 8: Outer Layer Imaging & Etching

After PTH plating, the outer layers are processed identically to the inner layers: dry film resist lamination, UV exposure through artwork, development, and etching. However, the outer layer copper already has the plated through-hole pads integrated into it, so the imaging must be precisely registered to the drilled hole targets.

Registration tolerance is the accuracy with which the outer layer pattern aligns to the drilled holes. Modern panel-processing uses target registration marks (fiducials) — crosshair or bulls-eye features etched into the panel corners — that the imaging equipment uses to calibrate the artwork position before exposure. Without fiducials, cumulative thermal expansion of the panel during processing can introduce registration errors that push traces off their intended pad positions.

Laser direct imaging (LDI) has become the standard for outer layer imaging in professional fab houses because it eliminates the mechanical alignment step entirely — the laser writes the image directly onto the dry film resist, controlled by the CAD data with sub-mil accuracy. LDI also enables trace widths as fine as 2 mil without the dimensional uncertainty of film expansion/contraction.

After etching and stripping, the outer layer pattern is complete — copper traces, pads, and planes are all defined. At this point the board has all its copper features but no solder protection.

Step 9: Solder Mask Application

Solder mask is the polymer coating (typically green, but available in red, blue, white, black, and clear) that covers the entire board surface except for the pads and holes where components will be soldered. It serves three functions:

• Prevents solder bridges between adjacent pads during assembly reflow
• Protects copper traces from oxidation and environmental contamination
• Provides dielectric isolation of surface traces, increasing creepage distance

The industry-standard solder mask material is LPI (Liquid Photoimageable) solder mask — a viscous, UV-curable polymer that is applied by curtain coat, spray coat, or screening, then exposed and developed like a photoresist. LPI mask thickness (typically 0.8–1.2 mils / 20–30 µm on the copper surface, thicker over dielectric) is controlled to ensure complete coverage of traces without coating the pads.

The development process removes the unexposed mask over the pad areas, leaving a clean, defined opening around each SMD pad, through-hole barrel, and any other area where solder must access the copper.

After development, the mask is fully cured — either UV-cured (photopolymerization) followed by thermal post-bake, or entirely thermal cure depending on the mask chemistry. The cure is critical: under-cured mask will be soft, chemically reactive, and will peel in subsequent assembly processes. Over-cured mask becomes brittle and may crack during thermal cycling.

Solder mask color is specified on the fab drawing. The default for commercial boards is green (the RSM-4000 series of inks from Taiyo or equivalent). Green provides the best contrast for visual inspection and has the most mature supply chain. White and yellow masks are sometimes specified for LED boards (better light reflection) or aesthetic reasons. Black mask is common in consumer electronics for its clean appearance but reduces visibility of traces for any rework or inspection — a practical consideration for boards that may need field repair.

Step 10: Surface Finishing

The final step in the fab process is applying the surface finish — a metallic or organic coating over the exposed copper pads that:

• Protects the copper from oxidation during storage and transit
• Provides a solderable surface for component placement
• Affects the board's shelf life (how long it can be stored before assembly)

The choice of surface finish is one of the most consequential decisions in the fab specification, because each finish has a distinct profile of solderability, shelf life, thermal cycling performance, and cost.

Surface Finish Comparison Table

Finish
Chemistry
Shelf Life
Solderability
Thermal Cycling
Cost
Best For
HASL (Leaded)
SnPb 63/37, hot-air level
12+ months
Excellent
Good
Low
Through-hole, legacy products
HASL-LF (Lead-Free)
SAC alloys (SnAgCu), hot-air level
6–12 months
Good
Fair
Low–Medium
RoHS-compliant through-hole
ENIG
Electroless Nickel Immersion Gold
12+ months
Excellent
Excellent
High
Fine-pitch BGA, high-reliability, RF
OSP
Organic Solderability Preservative (benzotriazole-based)
3–6 months
Good (single-reflow)
Fair
Low
Fine-pitch, high-density, cost-sensitive
Immersion Silver
ImAg, chemical silver deposit
6–12 months
Good
Good
Medium
High-speed signal, lead-free compatible
Immersion Tin
ImSn, chemical tin deposit
3–6 months
Good
Fair–Good
Medium
Press-fit connectors, flatpak packages
ENEPIG
Electroless Nickel Electroless Palladium Immersion Gold
12+ months
Excellent
Excellent
Very High
Gold wire bonding, extreme reliability

HASL (Hot Air Solder Leveling) applies molten solder (traditionally Sn63/Pb37, now Sn96.5/Ag3/Cu0.5 lead-free) to the board surface by dipping the panel in a solder pot and then leveling with high-pressure hot air blades. The result is a non-uniform pad surface — the leveling process cannot produce a perfectly flat plane. This is acceptable for through-hole components with larger pads (0.5 mm pitch and above) but is problematic for fine-pitch BGA and QFN packages where coplanarity of the solderable surface matters. The thickness variation across a HASL board can be ±30%, which is a concern for controlled-impedance designs.

ENIG (Electroless Nickel Immersion Gold) deposits a layer of nickel (typically 3–6 µm) followed by a thin immersion gold layer (0.05–0.1 µm) over all exposed copper pads. The nickel provides the solderable interface; the gold is a protective barrier that prevents nickel oxidation. ENIG produces a flat, uniform surface — essential for BGA, QFN, and any fine-pitch package. The tradeoff is cost (ENIG is typically 2–4x the cost of HASL) and the risk of black pad syndrome — a metallurgical failure at the nickel-gold interface caused by excessive phosphorus content in the nickel plate or improper immersion gold process control. Black pad causes joint fractures and is difficult to detect without X-ray inspection.

OSP (Organic Solderability Preservative) is an organic compound (typically benzotriazole or imidazole derivatives) that bonds to copper and prevents oxidation. It is the lowest-cost finish available and produces an extremely flat surface. Its limitation is shelf life: OSP boards are designed for single-pass assembly. After reflow, the OSP coating is consumed and does not reform. If the board needs reworking or will be stored for more than 3–6 months before assembly, OSP is not the right choice. OSP is also incompatible with wire bonding (used in chip-on-board and some IC packaging) because the organic layer prevents gold wire from bonding to the copper.

Immersion Silver deposits a thin layer of silver (0.1–0.4 µm) directly onto copper via a displacement reaction. It is lead-free, produces a flat surface, and maintains solderability for 6–12 months with proper storage (anti-tarnish packaging). Immersion silver is increasingly preferred over HASL for high-speed digital boards because it has lower insertion loss at microwave frequencies compared to ENIG's nickel barrier layer.

Key Quality Standards

PCB fabrication quality is not a subjective judgment — it is a measurable, auditable, internationally standardized set of requirements. The key standards are:

IPC-6012 is the primary qualification standard for rigid printed boards. It classifies boards into three performance classes:

• Class 1 — General Electronic Products: Consumer appliances, toys, non-critical industrial equipment. Failure consequences are low; some cosmetic defects are acceptable.
• Class 2 — Dedicated Service Electronic Products: Telecommunication equipment, sophisticated business machines, instruments where continued performance and extended life are required, but without the demands of uninterrupted service.
• Class 3 — High-Performance/Harsh Environment Electronic Products: Critical and life-support systems, aerospace, medical, automotive (ASIL-rated), and military systems where equipment must operate on demand without failure.

For each class, IPC-6012 specifies requirements for conductor width and spacing tolerances, annular ring dimensions, hole size tolerances, dielectric thickness, copper adhesion, insulation resistance, and dielectric withstanding voltage. A Class 3 board must pass more stringent thermal cycling tests, higher hipot test voltages, and tighter dimensional tolerances than a Class 2 board. Requesting Class 2 when your end application requires Class 3 is a procurement failure that can create legal liability.

UL 796 is the Underwriters Laboratories safety standard for printed wiring boards. A board that carries the UL94 V-0 rating (or VTM-0 for thin materials) has been tested for flame resistance — it will not support combustion and will self-extinguish within 10 seconds of flame removal. Most commercial boards carry this rating by default. UL listing is particularly important for products entering the US market that must bear the UL mark to pass retail and insurance requirements.

RoHS compliance (Restriction of Hazardous Substances, EU Directive 2011/65/EU, amended as RoHS 3 in 2015) restricts the use of lead, cadmium, mercury, hexavalent chromium, polybrominated biphenyls (PBB), polybrominated diphenyl ethers (PBDE), bis(2-ethylhexyl) phthalate (DEHP), butyl benzyl phthalate (BBP), dibutyl phthalate (DBP), and diisobutyl phthalate (DIBP) in electrical and electronic equipment. As of July 2019, RoHS 3 (adding four phthalate plasticizers) is in full force. Virtually all commercial PCB fabrication in 2026 must be RoHS compliant. The primary implication for fab is lead-free surface finishes (HASL-LF, ENIG, OSP, Immersion Silver) and verification that base materials (laminates, prepreg, solder mask, inks) carry RoHS declarations of conformity.

How to Choose a PCB Fabricator

Selecting a fabricator is a decision that has long-term consequences for product quality, supply chain stability, and cost. The following questions are not optional — they are the minimum due diligence required before committing a design to a supplier.

1. What IPC-6012 class do they certify to, and can they provide a certificate of conformance (C of C)?
Any reputable fab house will certify their processes to a specific IPC class. If they cannot produce a C of C with each shipment, their quality system is not formally controlled.

2. What are their minimum trace width, spacing, and annular ring capabilities?
Standard commercial capability is 4/4 mil (trace/space). Advanced houses quote 3/3 mil or 2/2 mil with LDI. If your design pushes beyond their stated capability, the fab will either refuse the order or build it to their limits and deliver non-conforming boards. Always confirm with the fab's DFM review before ordering.

3. What is their drill capability — maximum aspect ratio, minimum hole size, and blind/buried via support?
For multilayer boards with fine-pitch vias, ask specifically about:

• Minimum mechanical drill diameter (typically 0.15 mm for commercial equipment, 0.1 mm for precision equipment)
• Maximum aspect ratio (confirm it exceeds your board thickness / minimum hole diameter)
• Whether they support sequential lamination for blind/buried vias, and what the minimum bury pitch is

4. Do they support your surface finish requirement, and what is their process control for that finish?
ENIG process control is the most demanding. Ask whether they run statistical process control (SPC) on nickel thickness, phosphorus content, and gold thickness. A fab house that cannot show you a nickel bath analysis is likely not running tight process control.

5. Are their base materials UL-rated and RoHS-compliant? What laminate brands do they stock?
Primary laminate manufacturers (Isola, ITEQ, Shengyi, Kingboard) all carry full RoHS declarations. Secondary or off-brand materials may have inconsistent Dk/Df values, leading to impedance control failures on high-speed designs.

6. What are their registration tolerances for multilayer boards?
Multilayer registration is a common source of yield loss. Ask about their registration capability — the total stack-up tolerance from inner layer to outer layer. 3 mil (±75 µm) is achievable with LDI and fiducial-based registration. 5 mil is typical for film-based imaging.

7. What is their typical lead time, and do they offer expedited service?
Standard lead time for 2–6 layer boards is 5–10 business days for standard specs. Complex boards (8+ layers, high-Tg, fine-line) may run 10–20 days. Understand the fab's capacity constraints — a shop running at 95% utilization will have longer and less predictable lead times than one with spare capacity.

8. Do they offer electrical test (e-test) on every panel?
Flying probe or fixture-based electrical continuity and isolation testing of every panel is standard at professional fab houses. Confirm this is included in the base price, not an add-on. Boards delivered without e-test carry a known risk of short/open defects that will only be discovered at assembly.

9. What are their payment terms and tooling charges?
First-order tooling charges (artwork setup, film generation, drill program creation) are standard in the industry and typically range from $50–$200 depending on complexity. Understand whether these are one-time or per-order charges.

Frequently Asked Questions

What is the difference between a blind via and a buried via?

A blind via connects an outer layer to one or more inner layers but does not penetrate the entire board thickness — it is visible from only one side of the finished board. A buried via is completely internal, connecting inner layers only and invisible from either outer surface. Both via types are created through sequential lamination — building the board in sub-assemblies and then laminating additional layers on top. The trade-off is increased manufacturing complexity, longer cycle times, and higher cost. Blind and buried vias are essential for high-density interconnect (HDI) designs where routing space on surface layers is at a premium.

How does RoHS affect PCB fabrication?

RoHS compliance restricts lead content in electronic equipment sold in the EU. For PCB fabrication, the primary impacts are: (1) lead-free surface finishes must be used instead of traditional tin-lead HASL, with HASL-LF (SAC alloy), ENIG, OSP, or Immersion Silver as compliant alternatives; (2) base materials, prepregs, and laminates must have documented RoHS declarations confirming no restricted substances above threshold levels; and (3) solder mask and conformal coating materials must be RoHS compliant. RoHS also affects the assembly process — lead-free solders (SAC305: 96.5% Sn, 3% Ag, 0.5% Cu) melt at 217 °C versus 183 °C for tin-lead, requiring higher peak reflow temperatures that mandate high-Tg laminate materials.

What is IPC-6012 and why does it matter?

IPC-6012 is an industry-developed standard (published by IPC — Association Connecting Electronics Industries) that defines the qualification and performance requirements for rigid printed boards. It specifies material types, conductor requirements (width, thickness, spacing, annular ring), hole characteristics (size, plating, dielectric), visual criteria, and electrical test requirements — all tied to three performance classes. When you specify IPC-6012 Class 3 on your fab drawing, you are specifying a set of measurable requirements that the manufacturer must satisfy and be able to prove compliance for. Without this specification, there is no enforceable quality contract between the designer and the fab house.

How long does PCB fabrication take?

Standard lead times for commercial PCB fabrication range from 5 to 15 business days depending on board complexity, layer count, and the fab house's current workload. A basic 2-layer FR-4 board with standard specs (HASL finish, 1.6 mm thickness, 1 oz copper) can often ship in 5–7 days with expedited service. Multilayer boards (6+ layers), high-Tg materials, ENIG finish, blind/buried vias, or fine-line geometries extend lead times to 10–20 business days. Prototype quantities (5–25 boards) typically have shorter lead times than production quantities (100+ panels) at the same fab house because they run on a shared production schedule.

What causes PCB delamination during fabrication or assembly?

Delamination — the separation of layers within the PCB stack-up — is caused by one of three root factors: thermal mismatch, moisture absorption, or contamination. Thermal mismatch occurs when the board is subjected to temperatures that exceed the Tg of the laminate resin, causing the resin to soften and lose bond strength. This is why high-Tg materials are required for lead-free assembly reflow profiles. Moisture absorption happens when panels stored without desiccant packaging absorb atmospheric humidity that flashes to steam during the high-temperature assembly reflow, creating internal pressure that forces layers apart. Contamination (oil, flux residue, fingerprints with skin oils) at the copper-prepreg interface creates a weak boundary layer that fails under thermal or mechanical stress. All three are preventable through proper material handling, dry storage (bake-out at 120–125 °C for 4–6 hours for moisture-sensitive panels), and clean fabrication processes.

What is AOI inspection and why is it critical for multilayer boards?

Automated Optical Inspection (AOI) uses machine vision cameras and image processing software to compare a fabricated PCB panel against the original CAD design data. For multilayer boards, AOI is performed on each individual inner layer before lamination — because once the layers are pressed together, any defect inside the board is physically inaccessible without destructive cross-sectioning. AOI catches inner layer opens (broken traces), shorts (copper bridges), under-etch and over-etch conditions, and resist residue. Without AOI, an inner layer short that passes through lamination, drilling, plating, and full fabrication will only be discovered at final electrical test — after the full cost of subsequent processes has been incurred. Modern AOI systems achieve defect detection rates above 99.5% for standard geometries and are considered mandatory for Class 2 and Class 3 quality boards.

What is the shelf life of a PCB with different surface finishes?

Shelf life varies significantly by surface finish. HASL boards (both leaded and lead-free) can be stored for 6–12 months in sealed anti-tarnish packaging without significant degradation of solderability. ENIG boards have excellent shelf life — 12 months or more — because the immersion gold layer effectively seals the underlying nickel from oxidation. OSP boards have the shortest shelf life of the common finishes: typically 3–6 months before solderability begins to degrade. The organic preservative is consumed by gradual oxidation and atmospheric moisture; once the OSP layer is gone, the underlying copper oxidizes and becomes difficult to wet with solder. Immersion silver boards fall in the middle at 6–12 months, but silver is susceptible to sulfidation (tarnish) in environments with hydrogen sulfide, requiring sealed packaging with anti-tarnish interleaving.

How do I know if my board design is manufacturable before ordering?

The most reliable method is to request a DFM (Design for Manufacturability) review from your fab house before placing the order. Most professional fab houses offer this as a free or low-cost engineering review where an applications engineer checks your Gerber data against their actual manufacturing capabilities — drill sizes, minimum trace/spacing, impedance tolerances, layer registration, and fiducial placement. This review often catches design rule violations (trace too close to a drill, insufficient annular ring, missing solder mask clearance) that would otherwise result in non-conforming boards or production delays. Additionally, you can run your own DRC (Design Rule Check) in your EDA tool using a rule set derived from the specific fab's capabilities, rather than the default "generic" rule set that may be either too conservative or insufficiently strict for your chosen vendor.

Bottom Line

PCB fabrication is a mature but technically demanding precision manufacturing process. The gap between a well-specified design and a working board is bridged by ten distinct stages — each with its own critical parameters, failure modes, and quality controls. The manufacturers who consistently produce reliable boards are those who control their laminate traceability, their drill registration, their plating chemistry, and their inspection coverage with the same rigor applied to any precision engineering process.

For engineers and procurement specialists working with external fab houses, the most important discipline is specification discipline: specifying IPC-6012 class explicitly, confirming surface finish suitability for your assembly process and shelf life requirements, and running a DFM review before releasing the purchase order. The cost of a 30-minute pre-production review is a fraction of the cost of a board that comes back from assembly with tombstoned components, opens, or delamination failures.

The 2026 PCB fabrication landscape continues to push toward finer geometries, higher layer counts, and stricter environmental compliance. HDI designs with microvias are becoming standard in consumer electronics. Lead-free assembly mandates high-Tg materials as the default. As board complexity increases, the value of a fab house with documented process control, statistical process data, and a demonstrated track record in your specific technology segment grows accordingly. Choose based on proven capability in your technology space, not just on price and lead time.